Platform and method for remote attestation of a platform

ABSTRACT

In one embodiment, a method of remote attestation for a special mode of operation. The method comprises storing an audit log within protected memory of a platform. The audit log is a listing of data representing each of a plurality of IsoX software modules loaded into the platform. The audit log is retrieved from the protected memory in response to receiving a remote attestation request from a remotely located platform. Then, the retrieved audit log is digitally signed to produce a digital signature for transfer to the remotely located platform.

BACKGROUND

1. Field

This invention relates to the field of platform security.

2. Background

Advances in microprocessor and communication technologies with aplatform have opened up many opportunities for applications that gobeyond the traditional ways of doing business. Electronic commerce(e-commerce) and business-to-business (B2B) transactions are nowbecoming popular, reaching the global markets at a fast rate.Unfortunately, while modern microprocessor technology provides userswith convenient and efficient methods of doing business, communicatingand transacting, this technology fails to support remote attestation.Remote attestation is a technique for ascertaining the operating stateof a remotely located platform in a generally secure manner. Byascertaining the operating state of the platform prior to conductinge-commerce or B2B transactions with that platform, the user is impartedwith greater confidence in the security of the transaction.

BRIEF DESCRIPTION OF THE DRAWINGS

The features and advantages of the present invention will becomeapparent from the following detailed description of the presentinvention in which:

FIG. 1A is a diagram illustrating an embodiment of the logical operatingarchitecture for the IsoX™ architecture of the platform.

FIG. 1B is an illustrative diagram showing the accessibility of variouselements in the operating system and the processor according to oneembodiment of the invention.

FIG. 1C is a first block diagram of an illustrative embodiment of aplatform utilizing the present invention.

FIG. 2 is a flowchart of the illustrative operations of the platform togenerate an embodiment of the protected audit log.

FIG. 3 is a block diagram of an illustrative embodiment of a remoteattestation unit employed in the processor of FIG. 1C to obtain aprotected copy of the audit log.

FIG. 4 is a block diagram of an illustrative embodiment of a remoteattestation unit employed in the chipset of FIG. 1C to obtain aprotected copy of the audit log external to the chipset.

FIG. 5 is a block diagram of an illustrative embodiment of a remoteattestation unit employed in the chipset of FIG. 1C to obtain aprotected copy of the audit log internal to the chipset.

FIG. 6 is a block diagram of an illustrative embodiment of a remoteattestation unit employed in the fixed token of FIG. 1C to obtain aprotected copy of the audit log.

FIG. 7 is a block diagram of an illustrative embodiment of a remoteattestation unit employed in the removable token of FIG. 1C to obtain aprotected copy of the audit log.

DESCRIPTION

The present invention relates to a platform and method for remoteattestation of a platform. Remote attestation may be conducted when theplatform is operating in a special mode of operation. An example of thisspecial mode includes a processor isolated execution “IsoX” mode asdescribed below. More specifically, a processor executing in IsoX modeutilizes hardware-protected keying material that is cryptographicallyunique to produce a digital signature that includes informationconcerning the operating environment of the platform. The hardware thatprovides protection of the keying material, referred to herein as a“remote attestation unit” (RAU), may be integrated in a core logicdevice (e.g., a processor or a chipset component) or a non-core logicdevice (e.g., token).

In the following description, certain terminology is used to discussfeatures of the present invention. For example, a “platform” includescomponents that perform different functions on stored information.Examples of a platform include, but are not limited or restricted to acomputer (e.g., desktop, a laptop, a hand-held, a server, a workstation,etc.), desktop office equipment (e.g., printer, scanner, a facsimilemachine, etc.), a wireless telephone handset, a television set-top box,and the like. Examples of a “component” include hardware (e.g., anintegrated circuit, etc.) and/or one or more software modules. A“software module” is code that, when executed, performs a certainfunction. This code may include an operating system, an application, anapplet or even a nub being a series of code instructions, possibly asubset of code from an applet. A “link” is broadly defined as one ormore information-carrying mediums (e.g., electrical wire, optical fiber,cable, bus, or air in combination with wireless signaling technology) toestablish a communication pathway. This pathway is deemed “protected”when it is virtually impossible to modify information routed over thepathway without detection.

In addition, the term “information” is defined as one or more bits ofdata, address, and/or control and a “segment” is one or more bytes ofinformation. A “message” is a grouping of information, possiblypacketized information. “Keying material” includes any informationneeded for a specific cryptographic algorithm such as a DigitalSignature Algorithm. A “one-way function” is a function, mathematical orotherwise, that converts information from a variable-length to afixed-length (referred to as a “hash value” or “digest”). The term“one-way” indicates that there does not readily exist an inversefunction to recover any discernible portion of the original informationfrom the fixed-length hash value. Examples of a hash function includeMD5 provided by RSA Data Security of Redwood City, Calif., or SecureHash Algorithm (SHA-1) as specified in a 1995 publication Secure HashStandard FIPS 180-1 entitled “Federal Information Processing StandardsPublication” (Apr. 17, 1995).

I. Architecture Overview

In one embodiment, a platform utilizing the present invention may beconfigured with an isolated execution (ISOX™) architecture. The IsoX™architecture includes logical and physical definitions of hardware andsoftware components that interact directly or indirectly with anoperating system of the platform. Herein, the operating system and aprocessor of the platform may have several levels of hierarchy, referredto as rings, which correspond to various operational modes. A “ring” isa logical division of hardware and software components that are designedto perform dedicated tasks within the platform. The division istypically based on the degree or level of privilege, namely the abilityto make changes to the platform. For example, a ring-0 is the innermostring, being at the highest level of the hierarchy. Ring-0 encompassesthe most critical, privileged components. Ring-3 is the outermost ring,being at the lowest level of the hierarchy. Ring-3 typically encompassesuser level applications, which are normally given the lowest level ofprivilege. Ring-1 and ring-2 represent the intermediate rings withdecreasing levels of privilege.

FIG. 1A is a diagram illustrating an embodiment of a logical operatingarchitecture 50 of the IsoX™ architecture. The logical operatingarchitecture 50 is an abstraction of the components of the operatingsystem and processor. The logical operating architecture 50 includesring-0 10, ring-1 20, ring-2 30, ring-3 40, and a processor nub loader52. Each ring in the logical operating architecture 50 can operate ineither (i) a normal execution mode or (ii) an IsoX mode. The processornub loader 52 is an instance of a processor executive (PE) handler.

Ring-0 10 includes two portions: a normal execution Ring-0 11 and anisolated execution Ring-0 15. The normal execution Ring-0 11 includessoftware modules that are critical for the operating system, usuallyreferred to as the “kernel”. These software modules include a primaryoperating system 12 (e.g., kernel), software drivers 13, and hardwaredrivers 14. The isolated execution Ring-0 15 includes an operatingsystem (OS) nub 16 and a processor nub 18 as described below. The OS nub16 and the processor nub 18 are instances of an OS executive (OSE) andprocessor executive (PE), respectively. The OSE and the PE are part ofexecutive entities that operate in a protected environment associatedwith the isolated area 70 and the IsoX mode. The processor nub loader 52is a bootstrap loader code that is responsible for loading the processornub 18 from the processor or chipset into an isolated area as will beexplained later.

Similarly, ring-1 20, ring-2 30, and ring-3 40 include normal executionring-1 21, ring-2 31, ring-3 41, and isolated execution ring-1 25,ring-2 35, and ring-3 45, respectively. In particular, normal executionring-3 includes N applications 42 ₁-42 _(N) and isolated executionring-3 includes M applets 46 ₁-46 _(M) (where ‘N’ and “M” are positivewhole numbers).

One concept of the IsoX™ architecture is the creation of an isolatedregion in the system memory, which is protected by components of theplatform (e.g., the processor and chipset). This isolated region,referred to herein as an “isolated area,” may also be in cache memorythat is protected by a translation look aside (TLB) access check. Accessto this isolated area is permitted only from a front side bus (FSB) ofthe processor, using special bus cycles (referred to as “isolated readand write cycles”) issued by the processor executing in IsoX mode.

It is contemplated that links dedicated to solely support special cyclesduring remote attestation (referred to as “attestation cycles”) may beemployed within the platform. These attestation cycles may be based onthe isolated read and write cycles or may be independent from theisolated read and write cycles. In lieu of dedicated links, shared linksmay be employed within the platform to support remote attestation.Examples of these shared links include a Peripheral ComponentInterconnect (PCI) bus, an accelerated graphics port (AGP) bus, anIndustry Standard Architecture (ISA) bus, a Universal Serial Bus (USB)bus and the like. The attestation cycles are issued to prove locality,namely that a device with the keying material and a signing engine isaccessing information (e.g., an audit log) stored in protected memorywithin the platform. This mitigates the threat of software simulatingthe retrieval of the audit log for example.

The IsoX mode is initialized using a privileged instruction in theprocessor, combined with the processor nub loader 52. The processor nubloader 52 verifies and loads a ring-0 nub software module (e.g.,processor nub 18) into the isolated area. For security purposes, theprocessor nub loader 52 is non-modifiable, tamper-resistant andnon-substitutable. In one embodiment, the processor nub loader 52 isimplemented in read only memory (ROM).

One task of the processor nub 18 is to verify and load the ring-00S nub16 into the isolated area. The OS nub 16 provides links to services inthe primary operating system 12 (e.g., the unprotected segments of theoperating system), provides page management within the isolated area,and has the responsibility for loading ring-3 application modules 45,including applets 46 ₁ to 46 _(M), into protected pages allocated in theisolated area. The OS nub 16 may also support paging of data between theisolated area and ordinary (e.g., non-isolated) memory. If so, then theOS nub 16 is also responsible for the integrity and confidentiality ofthe isolated area pages before evicting the page to the ordinary memory,and for checking the page contents upon restoration of the page.

Referring now to FIG. 1B, a diagram of the illustrative elementsassociated with the operating system 10 and the processor for oneembodiment of the invention is shown. For illustration purposes, onlyelements of ring-0 10 and ring-3 40 are shown. The various elements inthe logical operating architecture 50 access an accessible physicalmemory 60 according to their ring hierarchy and the execution mode.

The accessible physical memory 60 includes an isolated area 70 and anon-isolated area 80. The isolated area 70 includes applet pages 72 andnub pages 74. The non-isolated area 80 includes application pages 82 andoperating system pages 84. The isolated area 70 is accessible only tocomponents of the operating system and processor operating in the IsoXmode. The non-isolated area 80 is accessible to all elements of thering-0 operating system and processor.

The normal execution ring-0 11 including the primary OS 12, the softwaredrivers 13, and the hardware drivers 14, can access both the OS pages 84and the application pages 82. The normal execution ring-3, includingapplications 42 ₁ to 42 _(N), can access only to the application pages82. Both the normal execution ring-0 11 and ring-3 41, however, cannotaccess the isolated area 70.

The isolated execution ring-0 15, including the OS nub 16 and theprocessor nub 18, can access to both of the isolated area 70, includingthe applet pages 72 and the nub pages 74, and the non-isolated area 80,including the application pages 82 and the OS pages 84. The isolatedexecution ring-3 45, including applets 46 ₁ to 46 _(M), can access onlyto the application pages 82 and the applet pages 72. The applets 46 ₁ to46 _(M) reside in the isolated area 70.

Referring to FIG. 1C, a block diagram of an illustrative embodiment of aplatform utilizing the present invention is shown. In this embodiment,platform 100 comprises a processor 110, a chipset 120, a system memory140 and peripheral components (e.g., tokens 180/182 coupled to a tokenlink 185 and/or a token reader 190) in communication with each other. Itis further contemplated that the platform 100 may contain optionalcomponents such as a non-volatile memory (e.g., flash) 160 andadditional peripheral components. Examples of these additionalperipheral components include, but are not limited or restricted to amass storage device 170 and one or more input/output (I/O) devices 175.For clarity, the specific links for these peripheral components (e.g.,PCI bus, AGP bus, ISA bus, USB bus, wireless transmitter/receivercombinations, etc.) are not shown.

In general, the processor 110 represents a central processing unit ofany type of architecture, such as complex instruction set computers(CISC), reduced instruction set computers (RISC), very long instructionword (VLIW), or hybrid architecture. In one embodiment, the processor110 includes multiple logical processors. A “logical processor,”sometimes referred to as a thread, is a functional unit within aphysical processor having an architectural state and physical resourcesallocated according to a specific partitioning functionality. Thus, amulti-threaded processor includes multiple logical processors. Theprocessor 110 is compatible with the Intel Architecture (IA) processor,such as a PENTIUM® series, the IA-32™ and IA-64™. It will be appreciatedby those skilled in the art that the basic description and operation ofthe processor 110 applies to either a single processor platform or amulti-processor platform.

The processor 110 may operate in a normal execution mode or an IsoXmode. In particular, an isolated execution circuit 115 provides amechanism to allow the processor 110 to operate in an IsoX mode. Theisolated execution circuit 115 provides hardware and software supportfor the IsoX mode. This support includes configuration for isolatedexecution, definition of the isolated area, definition (e.g., decodingand execution) of isolated instructions, generation of isolated accessbus cycles, and generation of isolated mode interrupts. In oneembodiment, as shown in FIG. 3, the RAU may be implemented as part ofthe processor 110.

As shown in FIG. 1C, a host link 116 is a front side bus that providesinterface signals to allow the processor 110 to communicate with otherprocessors or the chipset 120. In addition to normal mode, the host link116 supports an isolated access link mode with corresponding interfacesignals for isolated read and write cycles when the processor 110 isconfigured in the IsoX mode. The isolated access link mode is assertedon memory accesses initiated while the processor 110 is in the IsoX modeif the physical address falls within the isolated area address range.The isolated access link mode is also asserted on instruction pre-fetchand cache write-back cycles if the address is within the isolated areaaddress range. The processor 110 responds to snoop cycles to a cachedaddress within the isolated area address range if the isolated accessbus cycle is asserted.

Herein, the chipset 120 includes a memory control hub (MCH) 130 and aninput/output control hub (ICH) 150 described below. The MCH 130 and theICH 150 may be integrated into the same chip or placed in separate chipsoperating together. In another embodiment, as shown in FIG. 4, the RAUmay be implemented as part of the chipset 120.

With respect to the chipset 120, a MCH 130 provides control andconfiguration of memory and input/output devices such as the systemmemory 140 and the ICH 150. The MCH 130 provides interface circuits torecognize and service attestation cycles and/or isolated memory read andwrite cycles. In addition, the MCH 130 has memory range registers (e.g.,base and length registers) to represent the isolated area in the systemmemory 140. Once configured, the MCH 130 aborts any access to theisolated area when the isolated access link mode is not asserted.

The system memory 140 stores code and data. The system memory 140 istypically implemented with dynamic random access memory (DRAM) or staticrandom access memory (SRAM). The system memory 140 includes theaccessible physical memory 60 (shown in FIG. 1B). The accessiblephysical memory 60 includes the isolated area 70 and the non-isolatedarea 80 as shown in FIG. 1B. The isolated area 70 is the memory areathat is defined by the processor 110 when operating in the IsoX mode.

Access to the isolated area 70 is restricted and is enforced by theprocessor 110 and/or the chipset 120 that integrates the isolated areafunctionality. The non-isolated area 80 includes a loaded operatingsystem (OS). The loaded OS 142 is the portion of the operating systemthat is typically loaded from the mass storage device 170 via some bootcode in a boot storage such as a boot read only memory (ROM). Of course,the system memory 140 may also include other programs or data which arenot shown.

As shown in FIG. 1C, the ICH 150 supports isolated execution in additionto traditional I/O functions. In this embodiment, the ICH 150 comprisesat least the processor nub loader 52 (shown in FIG. 1A), ahardware-protected memory 152, an isolated execution logical processingmanager 154, and a token link interface 158. For clarity, only one ICH150 is shown although platform 100 may be implemented with multipleICHs. When there are multiple ICHs, a designated ICH is selected tocontrol the isolated area configuration and status. This selection maybe performed by an external strapping pin. As is known by one skilled inthe art, other methods of selecting can be used.

The processor nub loader 52, as shown in FIGS. 1A and 1C, includes aprocessor nub loader code and its hash value (or digest). After beinginvoked by execution of an appropriated isolated instruction (e.g.,ISO_INIT) by the processor 110, the processor nub loader 52 istransferred to the isolated area 70. Thereafter, the processor nubloader 52 copies the processor nub 18 from the non-volatile memory 160into the isolated area 70, verifies and places a representation of theprocessor nub 18 (e.g., a hash value) into the protected memory 152.Herein, the protected memory 152 is implemented as a memory array withsingle write, multiple read capability. This non-modifiable capabilityis controlled by logic or is part of the inherent nature of the memoryitself. For example, as shown, the protected memory 152 may include aplurality of single write, multiple read registers.

As shown in FIGS. 1C and 2, the protected memory 152 is configured tosupport an audit log 156. An “audit log” 156 is information concerningthe operating environment of the platform 100; namely, a listing of datathat represents what information has been successfully loaded into thesystem memory 140 after power-on of the platform 100. For example, therepresentative data may be hash values of each software module loadedinto the system memory 140. These software modules may include theprocessor nub 18, the OS nub 16, and/or any other critical softwaremodules (e.g., ring-0 modules) loaded into the isolated area 70. Thus,the audit log 156 can act as a fingerprint that identifies informationloaded into the platform (e.g., the ring-0 code controlling the isolatedexecution configuration and operation), and is used to attest or provethe state of the current isolated execution.

In another embodiment, both the protected memory 152 and unprotectedmemory (e.g., a memory array in the non-isolated area 80 of the systemmemory 140 of FIG. 1C) may collectively provide a protected audit log156. The audit log 156 is stored in the memory array while informationconcerning the state of the audit log 156 (e.g., a total hash value forthe representative data within the audit log 156) is stored in theprotected memory 152.

Referring still to FIG. 1C, the non-volatile memory 160 storesnon-volatile information. Typically, the non-volatile memory 160 isimplemented in flash memory. The non-volatile memory 160 includes theprocessor nub 18 as described above. Additionally, the processor nub 18may also provide application programming interface (API) abstractions tolow-level security services provided by other hardware and may bedistributed by the original equipment manufacturer (OEM) or operatingsystem vendor (OSV) via a boot disk.

The mass storage device 170 stores archive information such as code(e.g., processor nub 18), programs, files, data, applications (e.g.,applications 42 ₁-42 _(N)), applets (e.g., applets 46 ₁ to 46 _(M)) andoperating systems. The mass storage device 170 may include a compactdisk (CD) ROM 172, a hard drive 176, or any other magnetic or opticstorage devices. The mass storage device 170 also provides a mechanismto read platform-readable media. When implemented in software, theelements of the present invention are stored in a processor readablemedium. The “processor readable medium” may include any medium that canstore or transfer information. Examples of the processor readable mediuminclude an electronic circuit, a semiconductor memory device, a readonly memory (ROM), a flash memory, an erasable programmable ROM (EPROM),a fiber optic medium, a radio frequency (RF) link, and any platformreadable media such as a floppy diskette, a CD-ROM, an optical disk, ahard disk, etc.

In communication with the platform 100, I/O devices 175 includestationary or portable user input devices, each of which performs one ormore I/O functions. Examples of a stationary user input device include akeyboard, a keypad, a mouse, a trackball, a touch pad, and a stylus.Examples of a portable user input device include a handset, beeper,hand-held (e.g., personal digital assistant) or any wireless device. TheI/O devices 175 enable remote attestation of the platform 100 asdescribed below.

The token link 185 provides an interface between the ICH 150 and a fixedtoken 180 (e.g., a motherboard token) and/or a token reader 190 incommunication with a removable token 182 having characteristics similarto a smart card. In general, both types of tokens are devices thatperform dedicated I/O functions. For embodiments shown in FIGS. 6 and 7,tokens 180 and/or 182 include keying material (e.g., uniquecryptographic identifier such as a public/private key pair) andfunctionality to digitally sign the audit log (or a representationthereof) with the private key of the key pair. The token link interface158 in the ICH 150 provides a logical coupling between the token link185 and the ICH 150 and supports remote attestation for recovery of thecontents of the audit log 156.

II. Generating and Utilizing a Protected Audit Log

Referring now to FIG. 2, a flowchart of the illustrative operations ofthe platform to generate an embodiment of the protected audit log isshown. After power-on of the platform, segments of information areloaded into the system memory for processing by a processor (block 200).Examples of these segments of information include the processor nub andthe OS nub. Concurrent with the loading of the segments of informationinto the system memory, copies of each segment of the informationundergo a cryptographic hash operation to produce a hash value of thesegments. These hash values form an audit log stored in protected memory(blocks 205 and 210). In one embodiment, as shown in FIG. 1C, theprotected memory is implemented within the ICH. The memory is deemed“protected” when the contents of the memory are readable andnon-modifiable as described above. As subsequent segments of informationare selected for storage into the audit log, their hash values areappended to the audit log behind the previously computed hash values(block 215). It is contemplated that only hash values of selected nubsmay be stored in the audit log.

Ill. Remote Attestation

A. Commencement of Remote Attestation

In one embodiment, remote attestation is initiated by issuing anattestation request. The attestation request can originate from a remotesource or from an agent, local to the platform, which may or may not beacting as a proxy for the remote source. Normally, the attestationrequest comprises a primary query and/or one or more optional secondaryqueries. Each query causes the issuance of the attestation cycles, whichare designed to retrieve contents of the audit log. At a minimum, thecontents of the audit log may be used to verify the integrity of IsoX™processor and the OS nub of the platform. The secondary query retrieves,in addition to the audit log, a hash value of a selected IsoX appletloaded by the platform in order to verify the integrity of the applet.The hash value of the applet is generated on the fly by the OS nub. Thisavoids the need to store each and every loaded applet in the audit log.For primary queries, the RAU creates a message that may include theaudit log, a digital signature covering the audit log, and one or moredigital certificates for the RAU keying material and returns the messageto the requestor. For secondary queries, the RAU creates a message thatmay include the applet hash, the audit log, a digital signature coveringthe applet hash and audit log, and one or more digital certificates forthe RAU keying material and returns the message to the requestor toretrieve different information cited above.

B. Processor Integrated RAU

Referring now to FIG. 3, the RAU 300 is integrated into the processor110. The processor 110 is executing local code. Upon detection of anattestation request, the processor 110 establishes a communicationpathway with a component 310 responsible for storing the audit log 156.More specifically, in one embodiment, the local code executes a physicalinstruction in response to an attestation request. The physicalinstruction, when executed by the processor 110, causes the issuance ofattestation cycles by the processor 110 for reading contents of theaudit log 156.

For illustrative sake, the component 310 may be the ICH 150 of FIG. 1C,although other components within the platform 100 may be used. Thecommunications between the processor 110 and component 310 are throughone or more links such as a first link 310 and a second link 320. Theselinks 310 and 320 may be configured as dedicated links for handlingattestation cycles or shared links (e.g., host link, PCI bus, etc.)enhanced to handle the attestation cycles. These attestation cyclessignal the component 310 to accept reads of the audit log 156.

Upon receiving the audit log 156, the RAU 300 in the processor 110produces a digital signature 330 by digitally signing the audit log 156with the keying material 340 (e.g., a pre-stored private key). The auditlog 156, digital signature 330, and possibly digital certificates fromthe RAU keying material and packetized and sent as a message by the RAU300 to the requestor or to an area 350 accessible to the local code.

Of course, it is contemplated that if the audit log 156 is stored inunprotected memory, the ICH 150 may include a component (not shown) toverify that the contents of the audit log 156 have not been modifiedbefore releasing the audit log 156 to the processor 110. This may beaccomplished by the component 310 generating a hash value of the auditlog 156 recovered from unprotected memory and comparing the hash valueto the total hash value stored in protected memory.

As an optional embodiment, the user may want to control when the keyingmaterial 340 is used. For example, the platform may issue a requestmessage via a communications device 360 to a user opt-in device 380 overa protected communication path. In one embodiment, the communicationsdevice 360 is coupled to the token bus 185 and is employed with awireless receiver 365 and a wireless transmitter 370 (collectivelyreferred to herein as a “wireless transceiver”). The wireless receiverand transmitter 365 and 370 are used to establish and maintain directcommunications with the user opt-in device 380. Of course, the useropt-in device 380 may be coupled to communications device 360 via anylink type.

Upon receipt of the request message, the communications device 360issues a message to the user opt-in device 380 which enables the user toaffirm his or her desire to release the keying material 340 forgeneration of the digital signature 330. Based on an input by the useror lack thereof (e.g., depression of a key associated with user opt-indevice 380, inaction by the user, etc.), a response message is returnedto the communications device 360, which routes the contents of theresponse message to the RAU 300 over a protected communication path.Upon receipt of the response message, the RAU 300 proceeds with thegeneration of the digital signature 330 and/or digital certificates forthe RAU keying material and placement in the area 350 accessible to thelocal code if use of the keying material 340 is authorized by the user.

C. Chipset Integrated RAU

Referring now to FIG. 4, the RAU 300 is integrated into a core logicdevice 400. As shown, the processor 110 is executing local code. Upondetection of an attestation request, the core logic device 400establishes a communication pathway with a component 420 responsible forstoring the audit log 156. More specifically, in one embodiment, thelocal code sends a message to core logic device 400 based on anattestation request. The message causes the core logic device 400 toissue attestation cycles for reading contents of the audit log 156.

For example, in response to the attestation request, the core logicdevice 400 routes the attestation cycles to the component 420 via link430 to allow contents of the stored audit log 156 to be read. Link 430may be dedicated to support remote attestation or support multiplefunctions inclusive of attestation cycles generated by the core logicdevice 400. Upon receiving the contents of the stored audit log 156, thecore logic device 400 that contains the RAU 300 generates a digitalsignature 330 for the audit log 156 (as described above) and writes thedigital signature 330 into an area accessible to the local code.

However, as shown in FIG. 5, if the core logic device 400 also containsthe audit log 156, internal signals 450 within the core logic device 400are used to allow the RAU 300 to access the audit log 156. Again, uponreceiving the contents of the audit log 156, the RAU 300 of the corelogic device 400 generates the digital signature 330 of the audit logand possibly one or more digital certificates for the RAU keyingmaterial (not shown). This information is provided as a message to therequestor or written into the area accessible to the local code.

As an optional embodiment, the user may want to control when the keyingmaterial 340 is used. For example, the platform may issue a requestmessage 470 via a communications device 460 to a user opt-in device 490over a protected communication path. In one embodiment, thecommunications device 460 is coupled to the token bus 185 and isemployed with a wireless transceiver 465 in order to establish andmaintain direct communications with the user opt-in device 490.

In response to receiving the request message 470, the communicationsdevice 460 issues a message to the user opt-in device 490, whichsolicits the user to affirm his or her desire to release the keyingmaterial 340 for generation of the digital signature 330. Based on aninput by the user or lack thereof (e.g., depression of a key associatedwith the user opt-in device 490, inaction by the user, etc.), a responsemessage 480 is returned to the communications device 460, which routesthe contents of the response message 480 to the RAU 300 of the corelogic device 400 over a protected communication path. Upon receipt ofthe response message 480, the RAU 300 proceeds with the generation ofthe digital signature 330 and possibly digital certificates as describedabove and placement in the area accessible to the local code if use ofthe keying material 340 is authorized by the user.

D. Fixed Token Integrated RAU

Referring now to FIG. 6, if the RAU 300 is integrated in the fixed token180, the fixed token 180 communicates with a component (e.g., ICH 150)holding the audit log 156 over the token link 185. The functionality oftoken link 185 may be enhanced to support attestation cycles that areonly generated by the fixed token 180 when remote attestation is beingrequested. These attestation cycles are routed to the ICH 150 to requestacceptance of reads to the audit log 156. Upon receiving the contents ofthe audit log 156, the RAU 300 implemented in the fixed token 180generates a digital signature 330 by digitally signing the audit log 156with keying material 340 stored in the RAU 300. Thereafter, the RAU 300writes the digital signature 330 and possibly digital certificates forkeying material 340 to the requestor or into an area accessible to thelocal code.

As an optional embodiment, the user may want to control when the keyingmaterial 610 stored in the RAU 300 is used. For example, the user may beprompted to affirm his or her desire to release the keying material 340for generation of the digital signature 330. The prompt may beaccomplished, for example, through transmission of a message 620 via awireless transceiver 630 situated in the token 180. Affirmation of adesire to release the keying material 340 may be made by either (1)transmitting a return message 640 from a user opt-in device to the token180 as shown or (2) entering access information via a user opt-in device(not shown) physically connected to the token 180, for example.Thereafter, the RAU 300 proceeds with the generation of the digitalsignature 330 and/or digital certificate(s) for the keying material 340.Then, this information along with the audit log 156 are sent to therequestor or placed in the area accessible to the local code if use ofthe keying material 340 has been authorized by the user. Of course,opt-in messages 620 and 640 may be routed through the I/O device 175provided the messages are protected.

E. Removable Token Integrated RAU

Referring now to FIG. 7, if the RAU 300 is integrated in the removabletoken 182, the removable token 182 communicates with a component (e.g.,ICH 150) holding the audit log 156 over the token link 185. Thefunctionality of token link 185 may be enhanced to support attestationcycles that are only generated by the token reader upon insertion orconnection (i.e., wireless token) of removable token 182 when remoteattestation is being requested. These attestation cycles are generatedby the token reader 190 to the hardware storing the audit log 156 (e.g.,ICH 150) to request acceptance of reads to the audit log 156. Uponreceiving the contents of the audit log 156, the RAU 300 implemented inthe removable token 182 generates the digital signature 330 by digitallysigning the audit log 156 with keying material 340 stored in the RAU300. Thereafter, the RAU 300 writes the digital signature 330 and/ordigital certificate(s) for the keying material 340 into an areaaccessible to the local code.

As an optional embodiment, the user may want to control when the keyingmaterial 340 stored in the RAU 300 is used. For example, the user may beprompted to affirm his or her desire to release the keying material 340for generation of the digital signature 330. The prompt may beaccomplished, for example, through transmission of a message 720 via awireless transceiver 730 situated in the token 182. Affirmation of adesire to release the keying material 340 may be made by either (1)transmitting a return message 740 from a user opt-in device (not shown)to the token 182 as shown or (2) entering access information via a useropt-in device physically connected to the token 182 (not shown) forexample. Thereafter, the RAU 300 proceeds with the generation of thedigital signature 330 and/or digital certificates for the keyingmaterial 340, routing through the token reader 190 and placement in thearea accessible to the local code if use of the keying material 340 hasbeen authorized by the user. Of course, opt-in messages 620 and 640 maybe routed through the I/O device 175 provided the messages areprotected.

While this invention has been described with reference to illustrativeembodiments, this description is not intended to be construed in alimiting sense. Various modifications of the illustrative embodiments,as well as other embodiments of the invention, which are apparent topersons skilled in the art to which the invention pertains are deemed tolie within the spirit and scope of the invention.

1-63. (canceled)
 64. A method comprising: configuring a processor of aplatform to operate in an isolated execution mode in a ring 0 operatingmode, wherein the processor also supports one or more higher ringoperating modes, as well as a normal execution mode in at least the ring0 operating mode; loading at least one software module into a randomaccess memory (RAM) of the platform while the platform is operating inthe isolated execution mode; storing an audit log within protectedmemory of the platform, the audit log including data representing thesoftware module loaded in the isolated execution mode; retrieving theaudit log from the protected memory in response to receiving anattestation request; and digitally signing the audit log to produce adigital signature in response to the attestation request.
 65. The methodof claim 64, wherein the data representing the software module comprisesa cryptographic hash value.
 66. A method according to claim 64,comprising: issuing attestation cycles in response to receiving theattestation request; and utilizing the attestation cycles to retrievethe audit log from the protected memory.
 67. A method according to claim64, wherein the operation of digitally signing the audit log comprises:utilizing a private key to digitally sign the audit log.
 68. A methodaccording to claim 64, wherein: the operation of loading at least onesoftware module comprises loading, in a high privilege ring of theplatform, at least one module selected from the group consisting of aprocessor nub and an operating system (OS) nub; and the operation ofstoring an audit log within protected memory of the platform comprisesstoring, in the audit log, data that represents at least one loadedmodule.
 69. A method according to claim 64, wherein: the operation ofloading at least one software module comprises loading, in a highprivilege ring of the platform, at least one module selected from thegroup consisting of a processor nub and an operating system (OS) nub;and the operation of storing an audit log within protected memory of theplatform comprises storing, in the audit log, a cryptographic hash valuefor at least one loaded module.
 70. A method according to claim 64,wherein: the platform comprises a first platform; the operation ofreceiving an attestation request comprises receiving the attestationrequest from a second platform; and the method further comprisestransmitting a response that attests to integrity of the first platformto the second platform.
 71. A method according to claim 64, furthercomprising: receiving user input; and determining whether or not toprovide remote attestation, based on the user input.
 72. A methodcomprising: configuring a processor of a processing system to operate inan isolated execution mode in a ring 0 operating mode, wherein theprocessor also supports one or more higher ring operating modes, as wellas a non-isolated execution mode in at least the ring 0 operating mode;configuring the processing system to establish an isolated memory areain a random access memory (RAM) of the processing system and anon-isolated memory area in the RAM, wherein the processing system doesnot allow access to the isolated memory area if the processor is not inthe isolated execution mode; loading at least one software module intothe isolated memory area of the RAM while the processor is operating inthe isolated execution mode; storing an audit log in the processingsystem, the audit log including data representing the software moduleloaded into the isolated memory area; retrieving the audit log inresponse to receiving an attestation request; and digitally signing theaudit log to produce a digital signature in response to the attestationrequest.
 73. A method according to claim 72, wherein: the operation ofstoring an audit log comprises storing the audit log within protectedmemory of the processing system retrieving the audit log from theprotected memory in response to receiving an attestation request; and74. A method according to claim 72, wherein: the operation of storing anaudit log comprises storing the audit log within protected memory of theprocessing system; and the operation of retrieving the audit logcomprises retrieving the audit log from the protected memory.
 75. Amethod according to claim 72, wherein the operation of storing an auditlog comprises storing, in the audit log, data that represents softwarefor booting the processing system.
 76. A method according to claim 72,further comprising: executing a processor nub on the processor in theisolated execution mode; loading an operating system (OS) nub into theisolated memory area, the OS nub to manage at least a subset of an OS torun on the processing system; verifying the OS nub, using the processornub; and after verifying the OS nub, launching the OS nub.
 77. A methodaccording to claim 76, wherein the operation of storing an audit logcomprises storing data that represents the processor nub in the auditlog.
 78. A method according to claim 76, wherein the operation ofstoring an audit log comprises storing data that represents the OS nubin the audit log.
 79. A method according to claim 76, wherein theoperation of storing an audit log comprises: storing data thatrepresents the processor nub in the audit log; and storing data thatrepresents the OS nub in the audit log.